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Jean-Charles VANEL 05/04/2007 Introduction –Un point rapide sur le prototype physique Approvisionnement en wafer Montage à DESY Beam test au CERN –Eudet.

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Présentation au sujet: "Jean-Charles VANEL 05/04/2007 Introduction –Un point rapide sur le prototype physique Approvisionnement en wafer Montage à DESY Beam test au CERN –Eudet."— Transcription de la présentation:

1 Jean-Charles VANEL 05/04/2007 Introduction –Un point rapide sur le prototype physique Approvisionnement en wafer Montage à DESY Beam test au CERN –Eudet Etude des « Guard ring » 6’’ vs 4’’ ? Epaisseur  300 µm Couplage DC vs AC ? Demande de devis ?

2 Jean-Charles VANEL 05/04/2007 Le prototype physique  Approvisionnement en wafer –Partie centrale complète –Reste la partie basse à réaliser (soit 30 x 3 = 90 wafers) –Production Tchèque (100 raw wafers) en janvier (34 wafers) et février (41 wafers) Janvier : 34  20 OK Février : 41  4 OK !! Sur 100 wafers  75 matrices produites  24 bonnes à coller (3/15 slabs) Renvoi de 40 matrices pour retraitement de surface en mars  retour de 28 matrices le 02/04/2007. Mesures en cours  premier résultats bon : 10/13 OK (ouf !) –Production de 125 wafers supplémentaire pour début mai ! Petit espoir d’avoir « enfin » le proto complet pour test au CERN

3 Jean-Charles VANEL 05/04/2007

4 Jean-Charles VANEL 05/04/2007 Le prototype physique  Montage DESY –23, 24 et 25 avril (Marcel et moi…)  week 17 ! –Il faut ramener les « Slabs » à Desy Le prototype physique  test CERN –Montage à prévoir qui ? quand ? –week 23: transport to CERN –week 24: mechanical installation –week 25, 26 and half of 27: electronics commissioning and parasitic muon calibration –week 27-29: first main user period –week 29-32: three weeks of analysis, debug and repair –week 32-34: second main user period

5 Jean-Charles VANEL 05/04/2007 EUDET  Etude des « Guard ring » –new guard ring design will be tested on “pizza” mask containing 4 small test sensors –each having area of 3x3cm, with different guard ring design –It is essential to have opened passivation above the guard rings in order to contact them

6 Jean-Charles VANEL 05/04/2007 EUDET  Etude des « Guard ring » –Setup de test PCB + collage  LLR Micro sonde + electronique + banc de test  L.P.C. Clermont-Ferrand

7 Jean-Charles VANEL 05/04/2007 http://lhcb-doc.web.cern.ch/lhcb-doc/presentations/conferencetalks/postscript/2003presentations/Needhamflorence.pdf  Si injection de charges pas suffisant 

8 Jean-Charles VANEL 05/04/2007

9 Jean-Charles VANEL 05/04/2007 The VSL-337ND-S nitrogen laser emits pulses of 4 nsec in duration at 337 nm in the UV with a pulse energy of 300 uJ. Peak power is 75 kW and the average power is 6 mW at 20 Hz. The pulse repetition rate can be varied from less than one pulse per second up to 30 Hz, and up to 60 Hz in burst mode. A unique feature of the VSL-337ND-S is the optosync port, which provides a high speed TTL signal derived from the laser itself resulting in sub nanosecond jitter. Beam Quality The output of the VSL-337ND-S is near-diffraction limited producing a collimated beam. The excellent homogeneity of the beam is shown in the beam profile. This beam can be focused to better than a 3 µm spot producing very high peak power and an energy density of 4.5 kJ/cm 2. 10 * 20 * 60 cm Notre laser à colorant !! En excitant un colorant on peut augmenter la longueur d’onde jusqu’à 800nm. ( Le YAG précédant semble mieux adapté.)

10 Jean-Charles VANEL 05/04/2007 EUDET  6’’ vs 4’’ avec une épaisseur 300 µm ? –Pour la physique intérêt  moins de zone morte  6’’ –Epaisseur  dynamique chip SKYROC  300 µm –Pour intégration  robuste  4’’ et 500 µm … –Et qu’est ce qu’en pensent les constructeurs

11 Jean-Charles VANEL 05/04/2007 From Pavel Freundlich : As regards 4”/6” Si wafers option, ON Semiconductor Czech Republic has now both manufacturing lines. However, it is expected that 4” line will be phased out. The schedule is not given yet; my estimate is that it can be in 2-3 years. But who knows... If the EUDET prototype has to be finished by 2009, the sensors still can be on 4” wafers (most of them would be produced in 2007-2008). For the detector itself (2010??? and beyond) it would be wise to switch to 6”. For production on 6” it should be noted that: Currently, 6” float zone wafers are about 2-3x more expensive than 4”, although the area is only twice as large. Maskset for 6” wafers is approximately 2x more expensive 6” wafer would allow you to have sensors 10x10cm2 = 100cm2 instead of 6x6cm2 = 36cm2 on 4”. This would significantly reduce the dead area. Manufacturing of 300um thick 6” wafers is more difficult than 4” wafers from mechanical point of view. Even on well-established technology, some decrease in production yield can be expected due to larger area of the sensor. However, for pad sensors this should be only minor. From Pavel Freundlich : As regards 4”/6” Si wafers option, ON Semiconductor Czech Republic has now both manufacturing lines. However, it is expected that 4” line will be phased out. The schedule is not given yet; my estimate is that it can be in 2-3 years. But who knows... If the EUDET prototype has to be finished by 2009, the sensors still can be on 4” wafers (most of them would be produced in 2007-2008). For the detector itself (2010??? and beyond) it would be wise to switch to 6”. For production on 6” it should be noted that: Currently, 6” float zone wafers are about 2-3x more expensive than 4”, although the area is only twice as large. Maskset for 6” wafers is approximately 2x more expensive 6” wafer would allow you to have sensors 10x10cm2 = 100cm2 instead of 6x6cm2 = 36cm2 on 4”. This would significantly reduce the dead area. Manufacturing of 300um thick 6” wafers is more difficult than 4” wafers from mechanical point of view. Even on well-established technology, some decrease in production yield can be expected due to larger area of the sensor. However, for pad sensors this should be only minor. From Anita Topkar : I would like to offer some comments about using the 4" or 6" wafers from processing point of view. If we use 6" wafers, the thickness of the wafer will go to ~700 microns (the standard thickness of wafers). The full depletion voltages (unless we go for much higher resistivity) and leakage currents will increase accordingly. From our experience, we can say that the fabrication will be more difficult and yield will go down. Ofcourse, you might be having some other reasons for deciding 4" or 6" geometries. From Anita Topkar : I would like to offer some comments about using the 4" or 6" wafers from processing point of view. If we use 6" wafers, the thickness of the wafer will go to ~700 microns (the standard thickness of wafers). The full depletion voltages (unless we go for much higher resistivity) and leakage currents will increase accordingly. From our experience, we can say that the fabrication will be more difficult and yield will go down. Ofcourse, you might be having some other reasons for deciding 4" or 6" geometries.

12 Jean-Charles VANEL 05/04/2007 http://lhcb-doc.web.cern.ch/lhcb-doc/presentations/conferencetalks/postscript/2002presentations/Vertex2002Lehner.pdf  Si on fait un tour d’horizon : pas beaucoup de manip avec du 6’’ et 300 µm 

13 Jean-Charles VANEL 05/04/2007

14 Jean-Charles VANEL 05/04/2007 Pour le 6 pouces il y un poste à 360 µm. Le standard est au dessus de 500 µm.

15 Jean-Charles VANEL 05/04/2007 EUDET  Couplage DC vs AC ? –En AC  pas la place pour mettre une résistance et une capacité par pixel. C’est certain pour le PCB Pour la capacité sur le wafer  très difficile petite surface et « pin- hole effect » Pour la résistance sur le wafer  possible  mais pas économique (deux masques en plus soit 50 % plus chère) –En DC  ce n’est pas le miracle !!! Il faut quand même filtrer l’alimentation  capacité Il faut mettre des résistances pour isoler une/des matrice(s) des autres !

16 Jean-Charles VANEL 05/04/2007 EUDET  couplage DC

17 Jean-Charles VANEL 05/04/2007

18 Jean-Charles VANEL 05/04/2007 Carrés en traits fins: Wafers. En traits forts l’électrode de la capa.

19 Jean-Charles VANEL 05/04/2007 http://edc.ncms.org/PDF-Files/0006PublicNCMSDraft2000.pdf

20 Jean-Charles VANEL 05/04/2007 http://edc.ncms.org/PDF-Files/0006PublicNCMSDraft2000.pdf Epaisseur 25 µm. Isolement 2000V !!! Capacité 3 nF par pouce carré. Rouleau de 24 pouces. Prix ???

21 Jean-Charles VANEL 05/04/2007 EUDET  Demande de devis –Chez Hamamatsu (en cours) Matrices de 9x9 cm 2 Epaisseur 300 µm Haute résistivité ( >5kΩ.cm) –Chez WaferNet, Inc (à faire) Pour des « raw wafer » –de haute résistivité ( >5kΩ.cm) –6 inches. Petit rappel : ~130 € / wafer (prix pour quelques unités) Un poste IR Instru au LLR cette année


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