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1 Confidentiality/date line: 13pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Disclaimer information may also be appear in this area. Place flush left, aligned at bottom, 8-10pt Arial Regular, white Copyright: 10pt Arial Regular, white IBM System p5 © 2006 IBM Corporation IBM Systems Septembre 2006 IBM System p5 Journée Infrastructure

2 © 2004 IBM Corporation IBM eServer pSeries Page 2 Alain Lechevalier / Philippe Vandamme - IBM Agenda Journée Infrastructure 9H00 à 9H15 Accueil Café + Agenda 9H15 à 10H15 HACMP 10H15 à 10H30 Pause 10H30 à 12H00Le marché, Introduction à la consolidation et Offre pSeries POWER5, POWER5+ 12 H00 à 13H00 Repas 13H00 à 13H30Retour expérience 13H30 à 14H30Virtualisation POWER5 + Démonstration 14H30 à 15H30 EWLM / IBM Director 15H30 à 15H45Pause 15H45 à 16H45 Linux 16H45 à 17H00 Fiche d'évaluation questions réponse

3 © 2004 IBM Corporation IBM eServer pSeries Page 3 Alain Lechevalier / Philippe Vandamme - IBM Les intervenants Benjamin Alain Philippe Philippe Laurent

4 © 2004 IBM Corporation IBM eServer pSeries Page 4 Alain Lechevalier / Philippe Vandamme - IBM Journées Techniques …..Septembre 14 septembre Journée System p Les nouveautés des serveurs System p sous environnement Unix & Linux Journée System p 19 septembre Après-midi InfraStructures Business Intelligence Après-midi InfraStructures 21 septembre Matinée System p Tout savoir sur AIX et ses toutes dernières fonctionnalités Matinée System p 21 septembre Après-midi System p Haute disponibilité et business continuité sur les plateformes System p Après-midi System p 26 septembre Matinée System x La virtualisation dans le monde System x Matinée System x 28 septembre Matinée InfraStructures Plan de reprise d'activités, plan de continuité informatique... De l'approche globale aux solutions techniques IBMMatinée InfraStructures

5 © 2004 IBM Corporation IBM eServer pSeries Page 5 Alain Lechevalier / Philippe Vandamme - IBM System p 2H 2006

6 AX74FR 3 jours LPAR p5 vs p4 Formations Techniques AIX / pSeries Pour les nouveaux Clients AIX AX013FR 4jours UNIX : bases AX430F 3jours Korn Shell AX423FR 5jours Admin système AIX I AX035FR 4jours Architecture et outils Pour les Clients venant dUNIX AX426FR 3jours Install/ admin AIX pour unixien AX419FR 4jours Admin système AIX II AX490AF 5 jours Performances LPAR AX75FR 4jours Performance eServer p5 AX70FR 5 jours LPAR power4 Financez ces formations avec lIBM Education Pack : Carte à tarif réduit, valable 1 an, pour tous les employés de votre client et pour tous les cours du catalogue IBM Formation. 3 formules : 2375 pour 2500 de crédit de formation, 4600 pour 5000 de crédit, 9000 pour de crédit Intégralité des formations sur internet : ibm.com/fr/formation Toutes les formations pSeries figurent page 20 & 21 du Guide de Formation 2006 / N° de Tél pour inscriptions: AX732FR 5 jours Admin TCP/IP Spécialisations AX73FR 5 jours LPAR p5 ou AX540FR 5jours Planification et install AX550FR 5jours Administration AX560FR 5jours Résolution des incidents HACMP AX75FR 4 jours Gest Perf eServerp5 AX80FR 3 jours Nouveaut P5 et AIX AX81FR 2 jours Best pratice p5 D.Aubry 01/2006

7 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 7 © 2006 IBM Corporation IBM Systems IBM System pSeries Agenda Le Marché Infrastructures existantes Complexité et coûts Attentes du Marché / Stratégie IBM BilanVirtualisation Technologie POWER5 Loffre IBM System pSeries Virtualisation

8 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p © 2004 IBM Corporation Optional slide number: 10pt Arial Bold, white I 8 IBM System p : Committed to virtualization, openness and collaborative innovation WW Windows/UNIX/Linux Opportunity Continued pSeries Growth will require expansion into adjacent spaces - RFC ref: U L..xls

9 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p © 2004 IBM Corporation Optional slide number: 10pt Arial Bold, white I 9 IBM System p : Committed to virtualization, openness and collaborative innovation Source: All results as of 03/02/2005www.sap.com/benchmark/ 4-w p w p w p w rx w E25K* 72-w F15K 36-w E20K* 104-w F15K , w p5-595 IBM Sun HP 11,000 12,000 13,000 14,000 15,000 16,000 17,000 *Two processor cores per n- way *Two processor cores per n-way #1 SAP Users p5-595 has over 3X the per-CPU performance of HP SD Itanium 2 and over 5X per-CPU performance of SPARC64 2 tpmC (millions) ? ? Sun64-way Fujitsu 64-way HP PA- RISC 64-way HP Integrity 32-way 1.9 GHz p way 1.9 GHz p way 1.9 GHz p5-595 Oracle z/OS on eServer zSeries AIX 5L on eServer pSeries Reliability Enhance OS isolation and error detection Enhance middleware isolation and error detection Availability -Enable high OS availability through OS error containment and fine grain isolation with recovery -Provide application services management including auto restart of failed applications Serviceability -Improve operating system first failure data capture (FFDC) – determine problems without further disruption -Integrate non-disruptive OS service and problem determination aids -Support concurrent OS maintenance -Reduce scheduled outages Over 40 years of IBM large system innovation R.A.S Mainframe- inspired availability features Autonomic Computing Enhancements Chip Multiprocessing - Distributed Switch - Shared L2 Dynamic LPARs (32) POWER nm GHz Core Shared L2 Distributed Switch Simultaneous multithreading Micro-Partitioning Virtual Storage, Virtual Ethernet Concurrent firmware updates Enhanced scalability, parallelism Enhanced memory subsystem POWER5 130 nm GHz Core GHz Core Distributed Switch Shared L POWER5+ 90 nm Shared L2 > GHz Core Distributed Switch POWER6 65 nm L2 caches Ultra high frequency cores Advanced System Features Planned * POWER6+ 65 nm L2 caches > Ultra high frequency cores Advanced System Features Planned * Enhanced virtualization Advanced memory subsystem Enhanced error detection/recovery * All statements regarding IBM's future direction and intent are subject to change or withdrawal without notice, and represent goals and objectives only. IBM conserve son leadership sur le marché mondial Unix (en valeur)... Lunique plateforme en croissance selon le dernier rapport IDC! …mais les composantes du marché évolue UNIX®+Linux® poursuivent leur croissance estimée à 2.6% jusquen 2009 UNIX est stable voire en déclin Linux croît de 13% par an. Le prix des serveurs est en baisse Performance permettant de substituer du mid-range SMPs au High End Substitution et scale out permettant une croissance de Linux et Unix en low end

10 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p © 2004 IBM Corporation Optional slide number: 10pt Arial Bold, white I 10 IBM System p : Committed to virtualization, openness and collaborative innovation Magic Quadran

11 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 11 © 2006 IBM Corporation IBM Systems Nombre de serveurs Performance utilisée Nombre de serveurs Taux dutilisation estimé et historique de prolifération du parc de serveur Performance moyennne utilisée % 70-80% Moins de 20 % Quel est le taux dutilisation moyen dun serveur UNIX ? Quel est le taux dutilisation moyen dun serveur mainframe ? Quel est le taux dutilisation moyen dun serveur Microsoft® Windows® ? Evolution des Infrastructures dans le temps

12 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 12 © 2006 IBM Corporation IBM Systems Internet Firewall & Switch Internet Firewall & Switch ~ OpenPower OpenLDAP Bynari Samba HTTP SUSEfw2 Complexité dArchitectures (x)²²² (+)² Glkjhgfgfdes = (N²²)² ( )²²² Cluster => Paris, Lyon, Marseille,….

13 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 13 © 2006 IBM Corporation IBM Systems DatawareHouse DeveloppementB80 Datawarehouse IntegrationH70 Developpement R/3F40 Integration R/3H70 Interfaces DevF50 Interfaces QAH50 SRM SAP productionH70 Tests SRM SAPH70 Interfaces ProdH80 CRM Siebel ProductionH80 Datawarehouse Production6M1 Prod R/3 4.6 DB/CI6M1 Prod R/3 4.6 AS6H1 Prod R/3 4.6 AS6H1 Prod R/3 4.6 AS6H1 - Serveurs hétérogènes, - OS hétérogènes et propriétaires, - Stratègie de sauvegarde, dédiée, - Software hétérogènes - Administration complexes, coûteuse Stockage dédié, éparpillé, des To Architectures hétérogènes IBM, Bull AIX 4.3, 5.1, 5.2,.. version de ML 1…11 HP UX 8,9,10,11.. SUN Solaris 8, 9, 10

14 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 14 © 2006 IBM Corporation IBM Systems Cost of mgmt. & admin. 10% CAGR Les coûts de la compléxité New server spending (USM$) 3% CAGR Spending (USB$) Installed Base (M Units) $0 $20 $40 $60 $80 $100 $120 $140 $160 $180 $ Source: IDC

15 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 15 © 2006 IBM Corporation IBM Systems La décomposition du coût de possession, nous montre ou il faut rationaliser...

16 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 16 © 2006 IBM Corporation IBM Systems IBM can… So youre never left in the dark! IBM System pSeries Agenda Attentes du Marché ? Stratégie IBM

17 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 17 © 2006 IBM Corporation IBM Systems Protection des biens informationnels, confidentialité et intégrité Fiabilité et disponibilité de linfrastructure pour supporter les affaires Sécuriser les échanges dinformations critiques Maximiser lutilisation des ressources informatiques existantes Consolider les ressources info pour réduire la complexité des opérations Simplifier le monitoring et le management de linfrastructure info % de réponses intérêt élevé Management des infrastructures Permettre à linfrastructure danticiper, prévenir, diagnostiquer et résoudre les problèmes Déployer et optimiser automatiquement et en temps réel les ressources informatiques Source: Attributes and Capabilities Study, juin 2003 par EBOD Corporate Market Intelligence 1350 directeurs informatiques interrogés dans le monde Priorités des clients et Consolidation Réduction des coûts Amélioration de la qualité de service Réponse rapide aux changements / flexibilité Maximisation de lutilisation de linfrastructure (ROA) Virtualisation

18 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 18 © 2006 IBM Corporation IBM Systems Attentes du Marché et Stratégie IBM Réduction des Coûts Virtualization Engine Qualité de Service Autonomic Computing Réponse aux aléas de lenvironnement On Demand Business CoD Performance Technologie Bench Performance Pérennité de la solution Roadmap Virtualisation

19 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 19 © 2006 IBM Corporation IBM Systems Source: All results as of 03/02/2005www.sap.com/benchmark/ 4-w p w p w p w rx w E25K* 72-w F15K 36-w E20K* 104-w F15K , w p5-595 IBM Sun HP 11,000 12,000 13,000 14,000 15,000 16,000 17,000 *Two processor cores per n- way *Two processor cores per n-way #1 SAP Users p5-595 has over 3X the per-CPU performance of HP SD Itanium 2 and over 5X per-CPU performance of SPARC64 2 tpmC (millions) ? ? Sun64-way Fujitsu 64-way HP PA- RISC 64-way HP Integrity 32-way 1.9 GHz p way 1.9 GHz p way 1.9 GHz p5-595 Oracle z/OS on eServer zSeries AIX 5L on eServer pSeries Reliability Enhance OS isolation and error detection Enhance middleware isolation and error detection Availability -Enable high OS availability through OS error containment and fine grain isolation with recovery -Provide application services management including auto restart of failed applications Serviceability -Improve operating system first failure data capture (FFDC) – determine problems without further disruption -Integrate non-disruptive OS service and problem determination aids -Support concurrent OS maintenance -Reduce scheduled outages Over 40 years of IBM large system innovation R.A.S Mainframe- inspired availability features Foundation Autonomic Computing Enhancements Chip Multiprocessing - Distributed Switch - Shared L2 Dynamic LPARs (32) POWER nm GHz Core Shared L2 Distributed Switch Simultaneous multithreading Micro-Partitioning Virtual Storage, Virtual Ethernet Concurrent firmware updates Enhanced scalability, parallelism Enhanced memory subsystem POWER5 130 nm GHz Core GHz Core Distributed Switch Shared L POWER5+ 90 nm Shared L2 > GHz Core Distributed Switch POWER6 65 nm L2 caches Ultra high frequency cores Advanced System Features Planned * POWER6+ 65 nm L2 caches > Ultra high frequency cores Advanced System Features Planned * Enhanced virtualization Advanced memory subsystem Enhanced error detection/recovery * All statements regarding IBM's future direction and intent are subject to change or withdrawal without notice, and represent goals and objectives only. IDC Quarterly Server Tracker, 9/05 * 3Q based on internal MI estimate 45% 40% 35% 30% 25% 20% 15% 10% 5% Q102Q202 Q302 Q402 Q103 Q203 Q303Q403 Q104 Sun IBMHP Q204 Q304 Q404 Other Quarterly Revenue Share Q105 45% 40% 35% 30% 25% 20% 15% 10% 5% WW UNIX Server Revenue Share – Rolling 4Q Average Q205 Q305 * 2Q 05: IBM became WW UNIX® revenue share LEADER

20 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 20 © 2006 IBM Corporation IBM Systems

21 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 21 © 2006 IBM Corporation IBM Systems POWER4 (Single Threaded) CRL FX0 FX1 LSO LS1 FP0 FP1 BRZ Thread1 active Thread0 active No thread active Utilise les unités dexécution inutilisées des cycles dhorloge Vu par les logiciels comme utilisant un modèle de programmation symmetric multiprocessing (SMP) Vu par les logiciels comme utilisant un modèle de programmation symmetric multiprocessing (SMP) Execute deux threads par processeur : 2 files d'éxecution par cycle d'horloge Execute deux threads par processeur : 2 files d'éxecution par cycle d'horloge Résultats : Meilleure performance / Meilleure utilisation processeur Résultats : Meilleure performance / Meilleure utilisation processeur Réduction du temps dattente ~ 40% de débit supplémentaire AIX voit deux processeurs Apparait comme 4 CPUs par chip à loperating system (AIX 5L V5.3 et Linux) Capcacité de traitement SMT ST POWER5 (simultaneous multi-threading) Simultaneous multi-threading : p5 Mono processeur traditionnel, deux files dexécution actives Le processeur est partagé Les unités dexécution sont inutilisées pendant 70% du temps attente

22 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 22 © 2006 IBM Corporation IBM Systems Micro-Partitionnement –Processeurs partagés entre partitionsProcesseurs partagés entre partitions –Minimum : 1/10ème de pro- cesseur / partitionMinimum : 1/10ème de pro- cesseur / partition –Incrément 1/100émé de procIncrément 1/100émé de proc –AIX 5L V5.3 ou Linux*AIX 5L V5.3 ou Linux* Virtual I/O server –Ethernet PartagéEthernet Partagé –Réseau inter-partition interne basé sur la mémoireRéseau inter-partition interne basé sur la mémoire –Disques SCSI et Fibre Channel partagésDisques SCSI et Fibre Channel partagés –Support des partitions AIX 5L v5.3 et Linux*Support des partitions AIX 5L v5.3 et Linux* Partition Load Manager –Support dAIX 5L V5.2 et dAIX 5L V5.3Support dAIX 5L V5.2 et dAIX 5L V5.3 –Rééquilibrage des besoins en ressources mémoire et processeurRééquilibrage des besoins en ressources mémoire et processeur Accounting * SLES 9 ou RHEL AS 3 Options de virtualisation avancées Hypervisor Linux AIX 5L V5.2 Dynamically resizable 4 CPUs 2 6 Linux AIX 5L V5.3 Virtual I/O paths AIX 5L V 5.3 Micro-partitioning Manager Server LPAR 2 AIX 5L V5.3 LPAR 1 AIX 5L V5.2 LPAR 3 Linux PLM partitions Unmanaged partitions Hypervisor PLM agent AIX 5L V5.3 6 CPUs Ethernet sharing Virtual I/O server partition Storage sharing 1 CPU Hypervisor Linux AIX 5L V5.2 Dynamically resizable 4 CPUs 2 6 Linux AIX 5L V5.3 Virtual I/O paths AIX 5L V 5.3 Micro-partitioning Manager Server LPAR 2 AIX 5L V5.3 LPAR 1 AIX 5L V5.2 LPAR 3 Linux PLM partitions Unmanaged partitions Hypervisor PLM agent AIX 5L V5.3 6 CPUs Ethernet sharing Virtual I/O server partition Storage sharing 1 CPU Adapteurs E/S Disques Adaptateurs réseau LAN, WAN, … Virtual driver

23 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 © 2004 IBM Corporation Optional slide number: 10pt Arial Bold, white I 23 IBM System p5 : Committed to virtualization, openness and collaborative innovation Expérience de virtualisation sur les systèmes Power5 depuis Août 2004 Le mode SMT du Power5 est systématiquement utilisé gain entre 20 et 40% Le micro-partitionnement est très largement utilisé sur les systèmes moyen et haute gamme gain important au niveau du taux dutilisation du système La virtualisation des E/S est utilisée en complément dE/S réelles pour les flux secondaires et en secours dE/S réelles gain important en nombre de contrôleurs Automatisation de création des partitions par scripts simplification dadministration et de déploiement Virtualisation

24 IBM System p5 IBM Systems © 2006 IBM Corporation Union Bank of California: Un succès de consolidation de serveurs Nous nous sommes récemment orientés vers la ligne de serveurs 595 basé sur des processeurs p5 dIBM. Nous sommes excités par cette technologie en raison du fait quelle fournit à la fois de la capacité, des possibilités de virtualisation et de la performance. 91 vieux serveurs seront remplacés par 16 serveurs à base processeurs POWER5, tout en améliorant le traitement par quatre." -- Chip Hernandez, Union Bank CTO La banque profitera dune réduction de 43% en espaces au sol, 46% de réduction en consommation et 63% de réduction en coûts de maintenance, grâce à une consolidation de serveurs, a annoncé Hernandez. (http://www.banktech.com/news/showArticle.jhtml;jsessionid=ML VKUDU2LGB2SQSNDBESKHA?articleID= )

25 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 25 © 2006 IBM Corporation IBM Systems La Simplification grace à la Virtualization According to the Gartner Group, companies that ignore virtualization will pay 15 to 20 percent more than they need to for IT by La Virtualisation représente la capacité de présenter les ressources de traitements afin que les utilisateurs et applications peuvent facilement en obtenir la plus grande valeur, plutôt que les présenter de par leur implémentation, localisation géographique ou leurs caractéristiques. En dautres mots, Elle fournit une vue logique plutôt quune vue physique des données, ressources de traitements, capacité de stockage et autres ressources. Jonathan Eunice "What is Virtualization? Illuminata March 5, 2003

26 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 26 © 2006 IBM Corporation IBM Systems IBM can… So youre never left in the dark! IBM System pSeries Agenda POWER Technologie POWER5+

27 IBM pSeries in SMB IBM Confidential For IBM field sales and IBM Business Partner education only. Do not distribute to clients/prospects or duplicate for any other use IBM is a Chip Manufacturer… Industry Leader Technology and Architecture Over $5B in POWER factory revenue, growth 7+% Over $6 Billion investment in Power Manufacturing IBM shipped over 25 Million Power CPUs in 2004 Playstation3 and XBOX360 expect to sell ~40M units/year IBM awarded National Medal of Technology Playstation3

28 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 © 2004 IBM Corporation Optional slide number: 10pt Arial Bold, white I 28 IBM System p5 : Committed to virtualization, openness and collaborative innovation POWER2 POWER3 X X X Les processeurs Le Supercomputer le plus rapide au Monde Milliards dopérations par seconde Serveurs POWER4 POWER4 + POWER5 POWER3 POWER 5 + Embarqués PPC 401 PPC 405GP PPC 440GP PPC 440GX Lames WorkStations Jeux PPC 750 PPC 750CXe PPC 750FX PPC 750GX PPC 970FX PPC 970MP Binary Binary Compatibility IBM a vendu 28 millions de proc en 2004 et plus de 35 millions en 2005 Only 10% of these were in IBM Servers and Storage

29 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 © 2004 IBM Corporation Optional slide number: 10pt Arial Bold, white I 29 IBM System p5 : Committed to virtualization, openness and collaborative innovation Systèmes POWER Architecture chez IBM Serveurs System p5 and i5 pour les environnements de consolidation Unix, Linux et i5/OS les plus exigeants Serveurs P5 PowerPC pour les bénéfices du POWER à un prix exceptionnel BladeCenter pour le plus bas TCO par rapport à lespace occupé avec un exceptionnel rapport prix/performance Intellistation® pour les applications de stations de travail les plus exigeantes IBM TotalStorage® pour les solutions de stockage les plus rentables dans lindustrie POWER Architecture

30 © 2005 IBM Corporation IBM eServer p5 and pSeries SOI Silicon-On-Insulator Year Announced:1998 Production Chips: Sstar, POWER4 ƒ Place thin layer of SiO 2 under silicon surface ƒ 25% less power at the same frequency ƒ "Turbo charging" the transistors ƒ Less heat, more speed, greater reliability Copper Circuitry Year Announced:1997 Production Chips: Pulsar, POWER3-II ƒ New semiconductor manufacturing process ƒ Aluminum used during the past 30 years ƒ Copper has 40% lower resistivity than aluminum ƒ Less heat, greater speed Strained Silicon Year Introduced:2001 Production chips: Research Technology ƒ Silicon material is stretched/strained ƒ Speeds up flow of electrons ƒ Ultilizes Silicon Germanium as anchor material ƒ 35% boost in performance EinsTuner - EinsTuner - CAD Tool Year Developed: 2002 ƒ Determines the optimal size of each transistor ƒ Improves chip performance by 15 to 20% compared to hand-tuned circuits ƒ Faster / smaller / lower power circuits ƒ Innovation at IBM Research IBM 300mm semiconductor facility Year Opened: 2002 ƒ Designed to support the creation of chips with circuits smaller than 100 nanometers in size. ƒ A single 300mm wafer can hold up to about 50 billion transistors; chips produced on these wafers will have some structures comparable in size to viruses and DNA ƒ Largest capital investment in NY history SOI SiO 2 Advanced Chip Technologies

31 © 2005 IBM Corporation IBM eServer pSeries Page 31 Alain Lechevalier / Philippe Vandamme - IBM Roadmap Technologique pSeries IBM POWER Technologie => CMOS 10S Technologies Associées => Cuivre, SOI, Strengh Silicium, Lo K Dielectric Amélioration des structures => Couches Oxyde Ultra Fine (Hi K Dielectric) Design => Double Gate « Multi Core Design » QCM « Power efficient Design » DCM Caractéristiques Core, Chips High End High Volume Coût chip package + ++ Consommation Puissance + ++ Performance Mémoire SMP Scalabilité HPC Floating Point Perf Fonctions RAS étendues Stratègie de « Design POWER5+ » Ligne de fabrication Semi conducteur 300mm New! POWER5+ technology POWER5+

32 © 2004 IBM Corporation IBM eServer pSeries Page 32 Alain Lechevalier / Philippe Vandamme - IBM Architecture POWER5 + POWER5 CPU Shared L2 Cache POWER5 CPU POWER5 +

33 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 33 © 2006 IBM Corporation IBM Systems p5 505 p5 595 POWER5+ Fonctions autonomic avancées Pour réduire le nombre dintervention planifiées POWER5 - Extension des fonctions de detection et correction derreurs embarquées Résilience AIX 5LLinuxAIX 5Li5/OS*Linux AIX 5L kernel AIX 5L kernel Linux kernel Linux kernel SLIC Hypervisor Virtual I/O Virtual LAN IBM System p5 Hyperviseur dérivé de la technologie zSeries® Reliability Availibility Servicability Mainframe inspired RAS* Reliability, Availability and Serviceability Functions *Note: certaines fonctions RAS peuvent ne pas être disponibles au même moment sur SLES 9 et RHEL AS3 First Failure Data Capture DDR ECC Chipkill memory Mémoire redondante + bit-steering Contrôle logiciel de mémoire Alim & ventilation redondantes Désallocation dynamique de Proc. Désalloc. bus PCI-X, cache L2/L3 Désalloc. permanente mémoire Hot-plug : PCI-X, alim, ventilation Échange à chaud des disques Diagnostics internes avec LED

34 IBM System p5 IBM Confidential © 2005 IBM Corporation This information is intended for IBM Sales and Business Partner Education. It is not to be used with clients. Single Thread Simultaneous Multithreading Sans gestion de lalimentation Photos prises avec une caméra thermique pendant les tests dun prototype de Power5 Gestion de lalimentation Gestion dynamique de lalimentation

35 IBM System p5 © 2004 IBM Corporation © 2005 IBM Corporation UPTIME Arrêts non planifiés ? Des moyens pour améliorer la Qualité de Service Electronic Service Agent IBM eServer prerequisite Service Support and Best pratices Availibility Uptime Subscription Services https://techsupport.services.ibm.com/server/pseries.subscriptionSvcs Power5 code Matrix

36 Confidentiality/date line: 13pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Disclaimer information may also be appear in this area. Place flush left, aligned at bottom, 8-10pt Arial Regular, white Copyright: 10pt Arial Regular, white IBM System p5 © 2006 IBM Corporation IBM Systems Loffre IBM System p5 serveur et positionnement IBM can… So youre never left in the dark!

37 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 37 © 2006 IBM Corporation IBM Systems Gamme System p annonces du 25 Juillet 2006

38 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 38 © 2006 IBM Corporation IBM Systems New! New! Scale-up, scale-out, scale-within IntelliStation POWER 185 and 285 Express BladeCenter JS21 and JS21 Express System p5 550 & 550Q Express System p5 575 System p5 570 IBM Power Architecture : Dual-Core de 1.65 à 2.3 GHz Quad-Core à 1.5 et 1.65 GHz MCM de 1.65 à 2.3 GHz PowerPC à 2.5 et 2.7 GHz System p5 560Q Express System p5 185 Express System p5 520 & 520Q Express New! New! System p5 590 & 595 New! New! System p5 510 & 510Q Express New! New! System p5 505 & 505Q Express New! New! Dual-Core à 1.9 GHz MCM à 2.3 GHz MCM à 2.1 GHz Quad-Core à 1.65 GHz Dual-Core à 2.1 GHz

39 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 39 © 2006 IBM Corporation IBM Systems We make it easy to select the right system Reduce costs and improve operational efficiencies through leadership performance for the price and the IBM Virtualization Engine Most performance for the price* Most performance for the price* Most affordable* Most performance* Improved utilization Micro-Partitioning Dynamic LPAR Virtual LAN Virtual I/O Server Integrated Virtualization Manager Partition Load Manager * Comparison of UNIX and Linux operating system platform offerings from IBM System p5, IBM BladeCenter® and IBM IntelliStation POWER workstations as of February 14, 2006

40 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 40 © 2006 IBM Corporation IBM Systems POWER5+ DCM DCM : Dual-Chip Module P5-505,510, 520, 550, 570,575 POWER5+2.2, 2.1 GHz POWER5+ dual-core chip + L3 cache chip Deux coeurs (core) L3 PP L2 1 ou GHz ou 2.1 GHz P5+ Mémoire : 1 à 32 Go 4U (Module rack) p520 1 à GHz ou 2.1 GHz P5+ Mémoire : 1 à 64 Go 4U (Module rack) p550 1 ou GHz ou 2.1 GHz P5+ Mémoire : 1 à 32 Go 2U (Module rack) p510 1 ou GHz ou 2.1 GHz P5+ Mémoire : 1 à 32 Go 1U (Module rack) p505 2 à GHz ou 2.2 GHz P5+ Mémoire: 2 à 512 Go 4U (Module rack) jusquà 4 modules p570 La Gamme P5

41 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 41 © 2006 IBM Corporation IBM Systems Larchitecture modulaire * : p5-570 Pay as you grow sadapter quel que soit le futur Conserver les modules systèmes existants et simplement en ajouter de nouveaux au fur et à mesure que les besoins augmentent, Et, moins de contraintes de gestion, car il sagit dun SEUL système et non de quatre. et augmentent, p5-570 et augmentent ! SMP 2-16 voies p5-570 Architecture modulaire Pay as you grow SMP [non NUMA] Rack 19 Jusquà 512 Go mémoire DDR2 Micro-partitionnement* Virtual LAN, I/O* POWER et 2.2 GHz 4-8 voies Node1 Node0 2-4 voies 1x 4 way Node0 Node1 Node0 Node3 Node voies Node1 Node0 Node voies Most performance et augmentent, p5-570 et augmentent ! p5-570 Nouveau 1.9GHz 570 est 10% plus performant et 15% moins cher que lancien p GHz GHz 570 introduit des nouvelles performances >20% ainsi que des nouvelles capacitées de transactions que le précedent c IBM eServer p c HP rx c Fujitsu PP c HP SD #1 IBM Fujitsu HP – Trois fois la performance du HP rx8620 – Surpasse le Superdome HP-UX 64-core – 25% damélioration de performance sur POWER5 16-c System p ,000 1,000,000 1,500,000 tpmC

42 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 42 © 2006 IBM Corporation IBM Systems POWER5+ packaging DCM : Dual-Chip Module P5-505,510, 520, 550, 570,575 POWER5+2.2, 2.1 GHz POWER5+ dual-core chip + L3 cache chip Deux coeurs (core) L3 PP L2 MCM : Multi-Chip Module IBM eServer p5 p590 & p595 POWER5 2.3, 2.1 GHz Four dual-core POWER5+ chips + 4 L3 cache chips Huit coeurs (core) L3 PP L2 PP L3 PP L2 PP L3 PP L2 PP L3 QCM : Quad-Chip Module IBM System p5 510Q, 520Q, 550Q, 560Q POWER , 1.5 GHz Two POWER5+ dual-core chips + two L3 cache chips Quatre coeurs (core) La Gamme P5

43 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 43 © 2006 IBM Corporation IBM Systems POWER5+ QCM L3 PP L2 PP L3 QCM : Quad-Chip Module IBM System p5 510Q, 520Q, 550Q, 560Q POWER , 1.5 GHz Two POWER5+ dual-core chips + two L3 cache chips Quatre coeurs (core) 4 1,65 GHz P5+ Mémoire : 1 à 32 Go 4U (Module rack) p520Q 4 ou 8 1,65 GHz P5+ Mémoire : 1 à 64 Go 4U (Module rack) p550Q 4 1,65 GHz P5+ Mémoire : 1 à 32 Go 2U (Module rack) p510Q 4 à GHz Mémoire: 2 à 512 Go 4U (Module rack) jusquà 2 modules p560Q La Gamme P5

44 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 44 © 2006 IBM Corporation IBM Systems POWER5+ packaging DCM : Dual-Chip Module P5-505,510, 520, 550, 570,575 POWER5+2.2, 2.1 GHz POWER5+ dual-core chip + L3 cache chip Deux coeurs (core) L3 PP L2 MCM : Multi-Chip Module IBM eServer p5 p590 & p595 POWER5 2.3, 2.1 GHz Four dual-core POWER5+ chips + 4 L3 cache chips Huit coeurs (core) L3 PP L2 PP L3 PP L2 PP L3 PP L2 PP L3 QCM : Quad-Chip Module IBM System p5 510Q, 520Q, 550Q, 560Q POWER , 1.5 GHz Two POWER5+ dual-core chips + two L3 cache chips Quatre coeurs (core) La Gamme P5

45 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 45 © 2006 IBM Corporation IBM Systems POWER5+ MCM MCM : Multi-Chip Module IBM eServer p5 p590 & p595 POWER5 2.3, 2.1 GHz Four dual-core POWER5+ chips + 4 L3 cache chips Huit coeurs (core) L3 PP L2 PP L3 PP L2 PP L3 p595 p590 Jusquà 160 slot PCI Jusquà 18,7 To de stockge interne 16 à 64 2,1 à 2,3 GHz P5+ Mémoire : 8 Go à 2 To Rack 24 8 à 32 2,1 GHz P5+ Mémoire : 8 Go à 1 To Rack 24 Jusquà 240 slot PCI Jusquà 28,1 To de stockage interne Tpm/c : La Gamme P5

46 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 © 2004 IBM Corporation Optional slide number: 10pt Arial Bold, white I 46 IBM System p5 : Committed to virtualization, openness and collaborative innovation CoD Application A Application B Application C Conçu pour utiliser automatiquement et dynamiquement les processeurs et mémoire inactifs à partir des objectifs pré-définis, et augmenter ainsi les capacités de traitement du système *sur certains modèles Processeurs en réserve (« Reserve COD »), possibilité dactiver automatiquement de la puissance processeur lorsque lutilisation atteint 100% de la capacité. ~ p5 : un pas de plus vers le On Demand Permanent Capacity Upgrade on Demand (CoD) Customer Capacity Growth Defer 70-80% of payment for inactive capacity… Actual Planned Temporary Capacity on Demand Trial Capacity on Demand – Test 30 jours Trial Capacity on Demand – Test 30 jours Capacity Upgrade on Demand – Activation définitive Capacity Upgrade on Demand – Activation définitive On/Off Capacity on Demand – Post paiement On/Off Capacity on Demand – Post paiement Reserve Capacity on Demand – Pré paiement 30 jours Reserve Capacity on Demand – Pré paiement 30 jours Capacity BackUp (CBU) CBU System Production Server Data Center Data Recovery Center Ajuster la capacité du serveur au moment opportun Evolution des serveurs non disruptive Flexibilité de déploiement pour adresser les pics dactivité Déployer de nouveaux services rapidement

47 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 47 © 2006 IBM Corporation IBM Systems System p Virtualization Management Options All conditions above plus : No DLPAR – all partition changes require reboot JS21 No HMC Single-server management Entry-level partitioning Limited service function Client LPARs have only virtual devices One profile per partition Limited redundancy Supported on select models (System p5 560Q and below) No DLPAR in client partitions (VIOS only) POWER5 POWER5+ IVM ManagedHMC Managed HMC Required Multiple-server management Advanced Partitioning Dynamic LPAR, etc Physical devices in LPARs Multiple profiles per partition Full Redundancy HMC not supported No virtualization functionality without APV Hypervisor Partition IVM SP Browser SP Eliminates need to purchase dedicated hardware console Included at no additional charge with purchase of optional Advanced POWER Virtualization features or POWER Hypervisor and VIOS features.

48 Title/subtitle/confidentiality line: 10pt Arial Regular, white Maximum length: 1 line Information separated by vertical strokes, with two spaces on either side Copyright: 10pt Arial Regular, white IBM System p5 Optional slide number: 10pt Arial Bold, white I 48 © 2006 IBM Corporation IBM Systems NEW: Rear Door Heat Exchanger (RDHx) for Power Architecture systems Datacom Equipment Power Trends and Cooling Applications, ASHRAE 2005 INSTALLATION HEAT AND POWER LEVELS ARE MAJOR ISSUES… DEMANDS ARE GROWING… RDHx OFFERS RELIEF!… RDHx is now available for both 19 racks and 24 frames – can reduce cooling demand by up to 55% - and power requirements by up to 15%!

49 IBM System p5 IBM Systems © 2006 IBM Corporation Collaborate to innovate Virtualize Everything Automate Optimize Simplify IBM System pSeries et Virtualisation « Retour dexpérience » POWER5 et Virtualisation depuis Août 2004


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