Circuits à capacités commutées et microsystèmes Nicolas Delorme, ndelorme@cea.fr Cyril Condemine, ccondemine@cea.fr Marc Belleville, mbelleville@cea.fr

Outline Introduction State-of-the-art in capacitance sensing Sensor interfaces at LETI NEMS-induced (r)evolutions Concluding remarks Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Microsystem? Sensor/Actuator with interface IC A/D, D/A conversion Digital processing Communication Energy management Security management …in a small volume! Actuators Sensors Antenne Sensor/actuator ADC/DAC Interface Non-volatile memory Digital processing Power management RF Security management Energy sources antenna Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Our lab methodology « Top-down » approach Systems engineering Analytical models Linear & non-linear Control theory tools Systems engineering Circuit Signal & noise parameters Building blocks specifications IC technology High-level modelling Identification Compensator optimization (e.g. Matlab) Feedback Electrical engineering Test methodology Behavioral (VHDL-AMS, Verilog-A) RTL / Gate-level (VHDL, Verilog) Transistor-level (Eldo, Spice) (e.g. ADMS) Adjustments Test engineering Test equipment Analog Digital Mixed-signal +MEMS and E source Testability Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Context Why low-power? Handheld, Autonomous sensor nodes… Environment protection Available energy sources Batteries Energy scavenging 100 W 100 W 100 W 10 W 10 W 10 W Desktop mP 1 W 1 W 1 W Laptop mP GSM GSM 100 mW 100 mW 100 mW MP3 player, Palm 10 mW 10 mW 10 mW Bluetooth Transceiver 1 mW 1 mW 1 mW Miniature FM receiver 100 100 100 m m m W W W Ear implant 10 10 10 m m m W W W 1 1 1 m m m RFID tag W W W Digital wristwatch 100 nW 100 nW 100 nW Crystal oscillator 32 kHz 10 nW 10 nW 10 nW Standby Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Outline Introduction State-of-the-art in capacitance sensing Sensor interfaces at LETI NEMS-induced (r)evolutions Concluding remarks Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Review of circuit techniques (1/3) SC=Switched-Capacitor CT=Continuous-TIme After Wu et. Al., JSSC, May 2004 Power? Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Review of circuit techniques (2/3) AC bridge Switched-cap Transimpedance amp. Switched-cap+CDS After Yazdi et. Al. « Precision readout circuits for capacitive microaccelerometers », IEEE 2004 Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Review of circuit techniques (3/3) Power? Ease of implementation? Choice in prospect of co-integration Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Outline Introduction State-of-the-art in capacitance sensing Sensor interfaces at LETI NEMS-induced (r)evolutions Concluding remarks Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Our lab approach Sigma-delta-based Low bandwidth / high resolution High performance with modest analog Well suited to capacitive MEMS MEMS embedded in circuit architecture Lower power Lower noise Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Open-loop interfaces RFID pressure sensor 0.6 mm/3.3V CMOS Full on-chip digital filter (decimator) Extrapolation to Vdd=1v, 130nm: 30mW  ~500nW (V210, C6) SD capacitive sensor interface+ADC 12bits @BW=100Hz 2mA @3.3V (RFID) 150mA @3.3V (SD) 10mA @3.3V (Digital) Digital filter RFID Test SD Sensor Antenna Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Readout SD Power reduction? ref ref After Temes et. Al., ISCAS’98 Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

SD performance w.r.t. opamp BW & SR 2nd-order SD simulation, sampling T=1.5e-7s (F=6.4MHz) SNDR (dB) Opamp slew rate (x107V/s) Opamp settling time (x10-8 s)  Optimization margins in opamp bias currents Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Interface power optimization Time-dependant power & noise control Made possible by event knowledge SD sampling instants Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Interface power optimization ? Step further = Passive SD IntegratedR&C Block diagram R Continuous-time 2nd-order SD ADC (voltage input) 9bits @ BW=40KHz 15mA @ 3.3V (measured, core) In+ R R CLK C C out C C In- R R R Active area See also TI, ISSCC’04 (switched-cap) Performance summary Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Interface power optimization Passive SD applied to capacitive sensor interface Interface+ADC core Test caps Continuous-time 2nd-order SD capacitive sensor interface+ADC Core<Pad opening! 14bits @ BW=100Hz 1mA @ 3.3V (expected) Expected performance summary Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Closed-loop acceleration measurement Dynamic range: +/-2g & +/-10g Résolution (SNR+THD) = 15 bits over [0-100Hz] After C. Condemine et. Al., ISSCC’05 Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Readout & actuation SD Front end: LETI patent Back end after Temes et. Al., ISCAS’98 Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Readout & actuation SD Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Closed-loop controller 32-bit controller coefficients Fully programmable Coefficient design carried out with Laboratoire d’Automatique de Grenoble (LAG) Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Summary 15-bit SNR @50Hz closed-loop capacitive accelerometer, 0.35mm CMOS Better than 16-bit linearity Extensive use of LP techniques: Analog current reduction Analog activity windows Digital gated clock Digital level adaptation All @3.3V, Iana=150mA, Idig=0.65mA Digital @2.1V, Analog windowed  Power 2 Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Our lab roadmap Capacitive sensor interface performance OM 4kT D R 2 BW × Power - * ( ) = (*) ref. Sansen W. ST/lis3l02d  1e-05 0.0001 0.001 0.01 0.1 1 10 100 1000 10000 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 Figure of Merit Year Commercial circuits  Research circuits ST/lis2l01 ADXL202 VTI ST/lis2l02a ADXL150 ST/lis3l02a Kulah (Michigan) Yazdi (Michigan) Lang (kaiserslautern) Lemkin (Berkeley) LETI Analog output Digital output 2006 Brigati (Pavia) Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Outline Introduction State-of-the-art in capacitance sensing Sensor interfaces at LETI NEMS-induced (r)evolutions Concluding remarks Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

XG « thin SOI » accelerometers (Transparent retiré intentionnellement) Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Application to MIMOSA accelerometer Use of a LETI-designed SC SD circuit (readout+ADC) (in short: coarse but fast comparison of sensor charge to a reference charge + error reduction by integration) Top-level Simulink model: Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Simulation setup – Sensor model 2nd-order differential eq. with: Feedback non-linearities Non-linear damping l m L N u b e r o f t h : n Vread=0.1V Vread=0V Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Simulation setup – Electronics model Electronic imperfections: kT/C noise OTA noise & non-linearity Comparator offset Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Simulation setup – existing electronics Switched-cap Sigma-delta based Problems to expect: Low C0 & DC (reliable small caps difficult to integrate) Low pull-in voltage  Low signal  subject to glitches (only if high mechanical Fc) Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Results Without Casimir forces C0=7.2fF, DC=70aF/g All integrated caps=100fF Readout voltage=200mV Input=40g@67Hz Noise floor=-70dB@BW=100Hz SNR=33dB@BW=100Hz THD=-30dB Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Results Circuit parameter variations around nominal + + + 0.01 vmux_vs_ccfbcm.dat vmux_vs_cfbsd.dat Unrealistic integrated capacitance zone vmux_vs_gmotad.dat vmux_vs_idotad.dat Input-referred noise (Vrms) 0.001 + + + Previous Matlab simulation Higher power 0.0001 1e-16 1e-14 1e-12 1e-10 1e-08 1e-06 0.0001 0.01 1 100 Parameter Value (Ccfbcm (F), Cfbsd (F), gmotad (A/V), idotad (normalized w.r.t. nominal)) Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Capacitive resonant cantilever (1/2) Cantilever, 40µmx0.8µmx0.6µm Capacitive detection, Cs=40aF, Cp=0.2fF, Cpa=40fF, Ls=700H, Rs=80MW, DCmax=40aF Motional current: few nA After Verd et. Al., IEEE J. MEMS, June 2005 Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Capacitive resonant cantilever (2/2) Readout circuit: motional current integrated on parasitic capacitance After Verd et. Al., IEEE J. MEMS, June 2005 Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

Concluding remarks Several approaches possible for capacitance sensing SD readout well suited to low power with high resolution Passive approach benefits? Other than sigma-delta also good LP candidates Choice between SC and CT depends on Cs0 and Cparasitic A lot to gain from co-integrated NEMS (low Cs0 and Cparasitic)  AC bridge preferred? New « active » detection principles would relax noise constraints (higher signal) Transistor detection Tunnel effect … Circuits à capacités commutées et microsystèmes N. Delorme, Club EEA 2005

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