Copyright © 2003 Texas Instruments. All rights reserved. DSP C5000 Chapter 20 Polyphase FIR Filter Implementation for Communication Systems
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 2 Multirate Processing 1 of 2 Multirate processing arises in many fields of digital signal processing: Digital audio: sampling frequency conversion (32 kHz, 44.1kHz, 48kHz), sharp cut-off of FIR filter, … Signal processing for digital communications: symbol rate processing, bit rate processing, sample rate processing, … Speech processing: 3G speech codec (Adaptive Multi Rate), fractionnal pitch estimation,... …
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 3 Multirate Processing 2 of 2 Involves two actions on the digital signal: Downsampling: resampling downwards the digital signal in the digital domain. Upsampling: resampling upwards the digital signal in the digital domain. M FeFe F e /M Retain one sample over M and discard the M-1 others, every M samples. L FeFe LF e Insert L-1 zeros between each sample
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 4 Downsampling 1 of 2 Folding term M x(n)y(m)
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 5 Downsampling 2 of 2 Anti-aliasing Filter Noble identity for decimation M x(n)y(m) H(z) FeFe F e /M f c : (F e /M)/2 MH(z M )MH(z)
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 6 Upsampling 1 of 2 L x(m)y(n)
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 7 Upsampling 2 of 2 Interpolating Filter Noble identity for upsampling L x(m)y(n) H(z) LF e FeFe f C : (F e /L)/2 H(z)LH(z L )L
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 8 Polyphase Implementation of FIR Filters Decimation Case 1 of 4 MH(z)ME(z M ) Let n=lM+k with
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 9 Polyphase Implementation of FIR Filters Decimation Case 2 of 4 M E 0 (z M ) E 1 (z M ) E M-1 (z M ) z -1 FeFe F e /M M-1 filter evaluation over M M-1 filter evaluation over M are discarded. N filter length N filter length MH(z) Time Processing load (MAC/s) MT e N
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 10 Polyphase Implementation of FIR Filters Decimation Case 3 of 4 Using noble identity ME 0 (z) E 1 (z) E M-1 (z) z -1 M M FeFe F e /M Time Processing load (MAC/s) MT e N No more useless computations, but one sampling period over M, CPU is burdned with N MAC/s. No more useless computations, but one sampling period over M, CPU is burdned with N MAC/s.
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 11 Polyphase Implementation of FIR Filters Decimation Case 4 of 4 Equivalent commutator model E 0 (z) E 1 (z) E M-1 (z) FeFe F e /M Commutator runs at F e,. At each input sample only one component is computed and accu- Commutator runs at F e,. At each input sample only one component is computed and accu- mulated with the result of the previous one. The result is output when the last component is reached and accumulator is reset. This spreads the processing load over MT e. is reached and accumulator is reset. This spreads the processing load over MT e. Time Processing load (MAC/s) MT e N/M
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 12 Polyphase Implementation of FIR Filters Interpolation Case 1 of 5 LH(z)R(z L )L Let n=mL+L-1-k with
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 13 Polyphase Implementation of FIR Filters Interpolation Case 2 of 5 LH(z) LF e R 0 (z L ) R 1 (z L ) R M-1 (z L ) z -1 L Time Processing load (MAC/s) T e /L N L-1 multiplications by 0 over L L-1 multiplications by 0 over L For each filter evaluation. N filter length. N filter length. FeFe
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 14 Polyphase Implementation of FIR Filters Interpolation Case 3 of 5 Using noble identity R 0 (z) R 1 (z) R M-1 (z) LLL z -1 LF e FeFe At each output sampling instant, At each output sampling instant, only one component is non zero
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 15 Polyphase Implementation of FIR Filters Interpolation Case 4 of 5 Equivalent commutator model R 0 (z) R 1 (z) R M-1 (z) FeFe LF e Time Processing load (MAC/s) N/L T e /L For each output sampling instant one polyphase component is computed. For each output sampling instant one polyphase component is computed. When we reach again the first component (M-1) a new input sample is inputed in the delay line of each polyphase component.
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 16 Polyphase Implementation of FIR Filters Interpolation Case 5 of 5 Linear Periodically Varying Time system h0h0h0h0 z -1 hLhLhLhL h 2L z -1 h1h1h1h1 h L+1 h 2L+1 z -1 h L-1 z -1 h 2L-1 h 3L-1 z -1 h0h0h0h0 h1h1h1h1 h L-1 hLhLhLhL h L+1 h 2L-1 h 2L+1 h 3L-1 h 2L
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 17 Case Study Shaping filters for a QPSK modem : Emitter: interpolation case. Receiver: decimation case Efficient Algorithm Implementation : Good ordering of computations, Efficient memory organization and management.
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 18 Emitter 1 of 4 bits AkAk BkBk : Phase computation Cos() Sin() QPSK modulator RCF DAC FsFs FeFe FbFb BitfrequencySymbolfrequency Samplefrequency s(t)=1/2[cos(2 fot).cos( (Ak,Bk))-sin(2 fot).sin( (Ak,Bk))]
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 19 Emitter 2 of 4 Let F e =16F s (16 sample / symbol) Define a raised cosine filter with: 6 symbols length. Roll_off : 0.5 Matlab command h=RCOSFIR(0.5,3,16,1); In red: ideal interpolating filter In red: ideal interpolating filter In blue: actual RC filter In blue: actual RC filter 16H(z) Equivalent system
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 20 Emitter 3 of 4 The 16 Polyphase filters are defined by : With N=112 and L=16 Filter length is 97, impulse response is padded with 0 to reach 112=7*16
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 21 Emitter 4 of 4 Coefficients Symbols 15 th sample 1 st sample 2 nd sample When coefficient pointer reaches this address a new symbol will be input at the next output sample period R=flipud(reshape(h,8,12)); R=round(R*2^15); fid=fopen('coef.inc','wt'); for p=1:8 fprintf(fid,'\t.word\t%d\n,R(p,:)) end fclose(fid); Shuffle coefficients
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 22 Emitter (C callable).sect"coefs2" Ncomp.set16;number of polyphase component coefs2.include "coefpoly2.inc" coefsfin: coefsize.set coefsfin-coefs2 Lfil.setcoefsize/Ncomp;polyphase component length filbufQ.usect"filtre2",Lfil;data buffer.text_firinit: ST#coefs2,*(adbufQ);pointer to current coefs pointer STM#filbufQ,AR2;zeroed initial buffer condition RPT#Lfil-1 STLA,*AR2+ RET
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 23 _firTxQ:…;context save LD#var,DP STM#coefsize,BK MVDMadbufQ,AR2;current coefs pointer STM#1,AR0 STM#filbufQ,AR3;symbol buffer STLA,*AR3;new sample (guess hold during 16 samples) RPTZA,#Lfil-1;compute one polyphase component MAC*AR2+0%,*AR3+,A MVMDAR2,adbufQ;save new current coefs pointer SFTAA,-16 SFTAA,-1;output of RCF can be greater than 1 ! if delay symbols is needed BCendTxQ,NTC;jump if not necessary MAR*+AR3(-2) RPT#Lfil-2 DELAY*AR3- endTxQ: …;context restore RET
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 24 Symbol vs Sample Output F e : 16 khz F s : 1 khz constant for each symbol f= F s /8=125 Hz Symbol output Sample output
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 25 Receiver 1 of 2 FbFb ADC RCF FeFe FsFs BitprocessingSymbolprocessing
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 26 Receiver 2 of 2 Receiver structure is quite similar, except that: Each polyphase component has its own delay tap Each polyphase output has to be accumulated for M polyphase computations and accumulator is outputed every M input sample and reset. E 0 (z) E 1 (z) E M-1 (z)
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 27 Follow on Activities Laboratory 10 for the TMS320C5416 DSK Illustrates the effects of decimation and anti- aliasing filters. Laboratory 11 for the TMS320C5416 DSK Illustrates the effects of interpolation and anti- imaging filters. Application 9 for the TMS320C5416 DSK Uses interpolation and decimation to produce sharper cut-offs FIRs than would be obtained otherwise.
Copyright © 2003 Texas Instruments. All rights reserved. ESIEE, Slide 28 Reference Digital Signal Processing a Practical Approach by Emmanuel C. Ifeachor and Barrie W. Jervis. Chapter 9. Multirate digital signal processing.