University : Ammar Telidji Laghouat Faculty : Technology Department : Electronics 3rd year Telecommunications Professor : S.Benghouini Student: Tadj Souad.

Présentation au sujet: "University : Ammar Telidji Laghouat Faculty : Technology Department : Electronics 3rd year Telecommunications Professor : S.Benghouini Student: Tadj Souad."— Transcription de la présentation:

1 University : Ammar Telidji Laghouat Faculty : Technology Department : Electronics 3rd year Telecommunications Professor : S.Benghouini Student: Tadj Souad University year: 2018/2019 VLIW architecture (Very Long Instruction Word)

2 1 Definition of VLIW. 2 Objectif and applications of VLIW 3 VLIW Compiler. Data path. Conclusion. Advantages and disadvantages. Outline 4567 Goal of hardware design.

3 Definition of VLIW: Short for "Very Long Instruction word" a microprocessor design technology. Very-Long Instruction Word (VLIW) architectures are a suitable alternative for exploiting instruction-level parallelism (ILP) in programs. A chip with VLIW technology is capable of executing many operations within one clock cycle. Essentially, a compiler reduces program instructions into basic operations that the processor can perform simultaneously. The operations are put into a very long instruction word that the processor then takes apart and passes the operations off to the appropriate devices.

4 Objectif and applications of VLIW: Objectif of VLIW :  To eliminate the complicated instruction scheduling and parallel dispatch that occurs in most modern microprocessors. Applications: Applications:  VLIW architecture is suitable for Digital signal processing applications.  Processing of media data compression\decompression of image and speech data.

5 VLIW Compiler: It is responsible for static scheduling of instructions in VLIW processor. Finds out which operations can be executed in parallel in the program. It groups together these operations in single instruction which is the very long instruction word. Ensures that an operation is not issued before it's operands are ready.

6 Goal of hardware design: Reduce hardware complexity. To shorten the time cycle for better performance. To reduce power requirements.

7 Data path: One VLIW instruction word conatains maximum 8 primitive instructions. Eatch time one VLIW instruction word is fetched from cache and decoded. After decoding,All primitive insturctions in this VLIW word are issued to functional unit in parallel for execution. These primitive instructions are from the same VLIW word so they are guaranteed to be independent.

8 Figure :data path

9 Advantage of VLIW : The VLIW processors complexity is moved from the hardware to the software which means that the hardware can be smaller, cheaper, and requires less power to operate. Higher possible clock rate. It can execute more operation per cycle.

10 Disadvantages of VLIW Higher complexity of the compiler. Compatibility across implemenetations. Unscheduled events (e.g cache miss) stall entire processor. Code density:in case of un-filled opcodes in a VLIW,memory space and instruction bandwidth are wasted i.e low slot utilization.

11 CONCLUSION The microprocesor performance is dependent on how the compiler produces VLIW words. In theory, a VLIW processor should be faster and less expensive than a comparable RISC chip.

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