Delagnes 15/10/07 1 Resist Meeting Saclay 15/10/07 E. Delagnes.

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Delagnes 15/10/07 1 Resist Meeting Saclay 15/10/07 E. Delagnes

Delagnes 15/10/07 2 Labview simulation of resistive foil spread Goal: study the impact of shaping on resistive foil charge spread. Simple tool, complementary to S. Turnbulll simulation Based on a simplified version of equations of M. Dixit NIM paper. Numerical Convolution of : pad response taking charge spread into account: derivative of the electronics step response A(t): at first order enough to describe the electronics behaviour: tr rise time of preamp (or of the shaper) tf fall time of the preamp (or the shaper) a minus sign is missing here

Delagnes 15/10/07 3 Labview simulation of resistive foil spread All simulation parameters can be changed interactively: position of the initial charge deposition (X0,Y0). A sweep on this position can be made to calculate the pad response function. total inital charge spatial extension of this deposition size of the pad. R and C of the resitive foil. tr and tf of the shaper (or CSA). An exec version is available. The following results are made on the following conditions: pads 2mmx 6mm. 1fC charge. R=530 kOhm/sq C=210nF/m 2 tr= 120ns, variable tf

Delagnes 15/10/07 4 GUI screenshot

Delagnes 15/10/07 5 Pad Response measured on pad centered at (0,0) zoom

Delagnes 15/10/07 6 Convolution with electronics tr=120ns, tf vary tf = 200µs: True integrator tf = 2µs: Intermediate mode. will be available in AFTER tf = 100ns: Shaping mode Negative lobe, Ballistic Deficit !!

Delagnes 15/10/07 7 Pad Resp.Function with tr=120ns, tf vary Deficit = 10% only/ integrator

Delagnes 15/10/07 8 Possible evolutions More complex model for electronics (4 poles). Add noise. Integrate or take the peak ?? …….

Delagnes 15/10/07 9 ~100µm FR4 100µm Gaz 10M CDCD CcCc CRCR CLCL CDCD C CRCR CLCL Intérêts: -Limitation charge des sparks (effet ac) intégrée dans PCB -Cc auto-adaptée à CD (4* + grande si épaisseurs PCB et Gap = -Xtalk gauche et droite identiques => compensés si lecture analogique. Front-End Idée pour intégrer les capas de liaison au PCB

Delagnes 15/10/07 10 ~100µm FR4 100µm Gaz 10M CDCD CRCR CLCL CDCD C CRCR CLCL CL et CR différents => crosstalk gauche et droit différent possibilité de retrouver le strip d anode touché par interpolation si lecture analogique Intérêts: -Protection -Réduction du nombre de voies de lecture en gardant la résolution spatiale. Front-End Extension du principe pour limiter le nbre de voies delec tout en conservant la resol. spatiale